Inspection of power and ground layers in PCB images

In this work, we present an inspection method for power & ground (P&G) layers of printed circuit boards (PCB) also called utility layers. Design considerations for the P&G layers are different than those of signal layers. Current PCB inspection approaches cannot be applied to these layers. P&G layers act as internal ground, neutral or power sources. P&G layers are predominantly copper with occasional pad areas (without copper) called clearance. Defect definition is based on the spacing between the holes that will be drilled in clearances and the surrounding copper. Overlap of pads of different sizes and shapes are allowed. This results in complex, hard to inspect clearances. Our inspection is based on identification of shape, size and position of the individual pads that contribute to an overlapping clearance and then inspection of each pad based on design rules and tolerances. Main steps of our algorithm are as follows: 1) extraction and preprocessing of clearance contours; 2) decomposition of contours into segments: corner detection and matching lines or circular arcs between two corners; 3) determination of the pads from partial contour information obtained in step 2. 4) design rules checking for each detected pad.